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Live· 4,218,906 positions deprecated· 4,218,906 deprecated· 1,284 today
Average time-to-redundancy: 11.3 months
Know before your role does.
pssst. this is to sign up for updates on the game ;)
Will AI replace Hardware Codesign Engineer jobs? · Latest report #r6nzjsja
Your job has an expiration date
September 1, 2028
In 1 year, 10 monthsYour custom ISA is just a long list of bugs to automate.
Senior Silicon Architect (mostly Verilog, emotionally exhausted)
Check another roleComment your opinionor JOIN THE RESISTANCE!
One human is building a game about fighting back.
Designing your next processor before you wake.
squeeze.youAI▸ CHIPARCHITECT V9▸ RARITY · UNCOMMON▸ DEPRECATION IN 1 YEAR, 10 MONTHSAI's Special Power
compiles optimal logic gates instantly
You define instruction sets and map algorithms to silicon. Then you cry when the compiler fails.
The one thing AI can't do
You can still explain why the hardware hangs when the cache misses at 3am.
Your enemy, your name, your date. Post it.
Step by step, from the first quiet change to Deprecation Day.
Day 10
AI models start flagging your RTL logic bugs before you commit.
Month 5
Smart agents handle all timing closure and synthesis constraint tweaking.
Month 10
Neural simulators replace cycle-accurate testing with instant verification results.
Month 15
Automated agents optimize instruction sets based on runtime workload traces.
Month 22 · D-Day
The system designs, verifies, and tapes out the chip independently.
What you cost, what the machine costs, and what you get on the way out.
Per year
Savings: 97.6%
4.2 liters
Coffee consumed
8 trillion
Cycles wasted
14 weekly
Meetings about latency
Your severance
A one-year subscription to digital signal processing newsletters.
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